1. Field of the Invention
The present invention relates to a signal processing circuit and a semiconductor integrated circuit, and more particularly, it relates to a signal processing circuit and a semiconductor integrated circuit processing a signal recorded in an optical disk such as a CD (compact disk).
2. Description of the Prior Art
In order to reproduce a signal recorded in an optical disk such as a CD or a CD-ROM, an analog RF (radio frequency) signal read from the optical disk is converted to a digital signal with reference to a prescribed slice level. In general, the data recorded in the optical disk is an EFM (eight to fourteen modulation) signal, which is so set that a dc component thereof is basically zero. Therefore, the aforementioned slice level in the digital conversion is controlled to reach a center voltage level of the analog RF signal.
FIG. 9 is a circuit diagram showing the structure of a conventional signal reproducing circuit for an optical disk, including a digital conversion part and a slice level control part converting the aforementioned analog RF signal to a digital signal.
A signal read from an optical disk by an optical pickup is amplified by an RF amplifier 51, and supplied to an inversion input terminal of a comparator 53 through an input capacitor 52 for removing a dc component as an analog RF signal. The comparator 53 is a digital conversion part having a non-inversion input terminal supplied with a reference voltage Vref for comparing the aforementioned analog RF signal with the reference voltage Vref, converting the analog RF signal to a digital signal and outputting the same.
An end of a resistor 54 is connected between the capacitor 52 and the inversion input terminal of the comparator 53, and a positive electrode of an integration capacitor 55 is connected to the other end of the resistor 54 so that the center voltage level of the analog RF signal is adjusted by charging/discharging the integration capacitor 55.
A charge pump circuit 56 and a resistor 57 are provided between an output side of the comparator 53 and the positive electrode of the integration capacitor 55. The charge pump circuit 56 controls charging/discharging of the integration capacitor 55 in response to the output level of the digital signal output from the comparator 53. Thus, it follows that the charging quantity of the integration capacitor 55 is controlled in response to an average dc level of the output digital signal.
The integration capacitor 55 integrates the output of the comparator 53 through the charge pump circuit 56 and the resistor 57, for operating the average value of the digital signal. This average value is added to the analog RF signal through the resistor 54. Therefore, the center voltage level of the analog RF signal is adjusted in response to the voltage level of the positive electrode of the integration capacitor 55, i.e., the average dc level of the digital signal so that the slice level follows the center voltage level of the analog RF signal.
However, the aforementioned conventional signal reproducing circuit must be provided with the capacitor 52 for removing the dc component and the resistor 54, and hence the circuit area is disadvantageously enlarged to increase the cost. When the capacitor 52 and the resistor 54 are not built in the chip but externally provided, parasitic capacitances of the capacitor 52 and the resistor 54 are increased to result in difficulty in speeding up the operations.
An object of the present invention is to provide a signal processing circuit and a semiconductor integrated circuit capable of implementing a function of adjusting a slice level with a small-scale circuit area while keeping the circuit at a high speed.
Another object of the present invention is to provide a signal processing circuit and a semiconductor integrated circuit capable of correctly detecting a dc component of an input signal.
A signal processing circuit according to an aspect of the present invention comprises an amplifier circuit amplifying an input signal, a conversion circuit converting an output from the amplifier circuit to a digital signal on the basis of a first reference value and a feedback circuit integrating the digital signal from the conversion circuit and feeding back the integrated digital signal as a second reference value of the amplifier circuit.
In this signal processing circuit, the amplifier circuit amplifies the input signal, the conversion circuit converts the output from the amplifier circuit to a digital signal on the basis of the first reference value, and the feedback circuit integrates the digital signal from the conversion circuit and feeds back the integrated digital signal as the second reference value of the amplifier circuit. Consequently, neither a capacitor for removing a dc component nor a resistor may be provided but it is possible to implement a function of adjusting a slice level with a small-scale circuit area while keeping the circuit at a high speed.
The amplifier circuit preferably amplifies the difference between the input signal and the second reference value. In this case, the difference between the input signal and the second reference value as fed back can be so amplified that the slice level can be properly controlled.
The amplifier circuit preferably includes at least two stages of amplifier circuits formed by a first amplifier circuit located on an input side and a second amplifier circuit located on an output side.
In this case, the first amplifier circuit can adjust the center voltage level of the input signal while the second amplifier circuit can amplify the input signal to a desired amplitude, so that the input signal can be amplified in high precision and output to the conversion circuit.
At least part of the amplifier circuit preferably includes a complete differential amplifier circuit, and one output of the complete differential amplifier circuit is preferably input in the conversion circuit as the first reference value.
In this case, the amplifier circuit can have a wide output range so that the amplification degree can be increased to operate the conversion circuit at a high speed and in-phase noise can be eliminated.
The feedback circuit preferably integrates the digital signal from the conversion circuit and feeds back the integrated digital signal to the first amplifier circuit.
In this case, the digital signal from the conversion circuit is integrated and fed back to the first amplifier circuit, whereby the center voltage level of the input signal can be adjusted in response to the level of the digital signal for properly controlling the slice level.
The feedback circuit preferably includes an integration capacitor and a charging/discharging circuit charging/discharging the integration capacitor in response to the level of the digital signal from the conversion circuit.
In this case, the charging/discharging circuit charges/discharges the integration capacitor in response to the level of the digital signal from the conversion circuit so that the center voltage level of the input signal can be adjusted in response to the level of the digital signal.
A signal processing circuit according to another aspect of the present invention comprises an amplifier circuit amplifying an input signal, a conversion circuit converting an output from the amplifier circuit to a digital signal on the basis of a first reference value and a detection circuit detecting a dc component of the signal not yet amplified by the amplifier circuit.
In this signal processing circuit, the amplifier circuit amplifies the input signal, the conversion circuit converts the output from the amplifier circuit to a digital signal on the basis of the first reference value, and the detection circuit detects the dc component of the signal not yet amplified by the amplifier circuit. Thus, it is possible to detect the dc component of the signal not yet subjected to amplification, i.e., the signal not yet subjected to adjustment of the center voltage level in response to the level of the digital signal from the conversion circuit, whereby the dc component of the input signal can be correctly detected.
The signal processing circuit preferably further comprises a feedback circuit integrating the digital signal from the conversion circuit and feeding back the integrated digital signal as a second reference value of the amplifier circuit.
In this case, the amplifier circuit amplifies the input signal, the conversion circuit converts the output from the amplifier circuit to a digital signal on the basis of the first reference value, and the feedback circuit integrates the digital signal from the conversion circuit and feeds back the integrated digital signal as the second reference value of the amplifier circuit. Consequently, neither a capacitor for removing a dc component nor a resistor may be provided but it is possible to implement a function of adjusting a slice level with a small-scale circuit area while keeping the circuit at a high speed.
The amplifier circuit preferably amplifies the difference between the input signal and the second reference value. In this case, the difference between the input signal and the second reference value as fed back can be so amplified that the slice level can be properly controlled.
The detection circuit preferably includes at least either a peak hold circuit detecting and holding a peak value of the signal not yet amplified by the amplifier circuit or a bottom hold circuit detecting and holding a bottom value of the signal not yet amplified by the amplifier circuit.
In this case, the peak hold circuit or the bottom hold circuit detects the peak value or the bottom value of the signal not yet amplified by the amplifier circuit, whereby it is possible to detect the peak value or the bottom value of the signal not yet subjected to adjustment of the center voltage level in response to the level of the digital signal from the conversion circuit, so that a correct peak or bottom value of the signal can be detected.
The detection circuit preferably includes at least two stages of detection amplifier circuits formed by a first detection amplifier circuit located on an input side and a second detection amplifier circuit located on an output side, a peak hold circuit detecting and holding a peak value of an output signal from the second detection amplifier circuit and a bottom hold circuit detecting and holding a bottom value of the output signal from the second detection amplifier circuit.
In this case, the first and second detection amplifier circuits amplify the signal not yet subjected to adjustment of the center voltage level in response to the level of the digital signal from the conversion circuit similarly to the amplifier circuit so that the peak value and the bottom value of the signal amplified to a desired amplitude can be detected, whereby a peak value and a bottom value of the signal can be more correctly detected.
The detection circuit preferably includes a first detection amplifier circuit located on an input side, a second detection amplifier circuit amplifying an output signal from the first detection amplifier circuit, a third detection amplifier circuit amplifying an output signal from the second detection amplifier circuit, a peak hold circuit detecting and holding a peak value of an output signal from the third detection amplifier circuit and a bottom hold circuit detecting and holding a bottom value of the output signal from the third detection amplifier circuit.
In this case, the first to third detection amplifier circuits amplify the signal not yet subjected to adjustment of the center voltage level in response to the level of the digital signal from the conversion circuit similarly to the amplifier circuit so that the peak value and the bottom value of the signal amplified to a desired amplitude can be detected, whereby a peak value and a bottom value of the signal can be more correctly detected.
The amplifier circuit preferably includes at least two stages of amplifier circuits formed by a first amplifier circuit located on an input side and a second amplifier circuit located on an output side.
In this case, the first amplifier circuit can adjust the center voltage level of the input signal while the second amplifier circuit can amplify the input signal to a desired amplitude, so that the input signal can be amplified in high precision and output to the conversion circuit.
At least part of the amplifier circuit preferably includes a complete differential amplifier circuit, and one output of the complete differential amplifier circuit is preferably output to the conversion circuit as the first reference value.
In this case, the amplifier circuit can have a wide output range so that the amplification degree can be increased to operate the conversion circuit at a high speed and in-phase noise can be eliminated.
The amplifier circuit preferably includes a first amplifier circuit located on an input side, a waveform shaping circuit shaping the waveform of an output signal from the first amplifier circuit, a second amplifier circuit amplifying an output signal from the waveform shaping circuit and a third amplifier circuit located on an output side for amplifying an output signal from the second amplifier circuit, the second and third amplifier circuits preferably include complete differential amplifier circuits, and one output of the third amplifier circuit is preferably input in the conversion circuit as the first reference value.
In this case, it is possible to adjust the center voltage level of the input signal with the first amplifier circuit, shape the waveform of the signal subjected to adjustment of the center voltage level with the waveform shaping circuit, and amplify the signal subjected to waveform shaping to a desired amplitude in two stages with the second and third amplifier circuits. Further, complete differential amplifier circuits are employed as the second and third amplifier circuits, whereby the amplifier circuit can have a wide output range so that the amplification degree can be increased to operate the conversion circuit at a high speed and in-phase noise can be eliminated.
The feedback circuit preferably integrates the digital signal from the conversion circuit and feeds back the integrated digital signal to the first amplifier circuit.
In this case, the digital signal from the conversion circuit is integrated and fed back to the first amplifier circuit, whereby the center voltage level of the input signal can be adjusted in response to the level of the digital signal and a slice level can be properly controlled.
The feedback circuit preferably includes an integration capacitor and a charging/discharging circuit charging/discharging the integration capacitor in response to the level of the digital signal from the conversion circuit.
In this case, the charging/discharging circuit charges/discharges the integration capacitor in response to the level of the digital signal from the conversion circuit, so that the center voltage level of the input signal can be adjusted in response to the level of the digital signal.
A semiconductor integrated circuit according to still another aspect of the present invention comprises a signal processing circuit processing an output signal from an optical pickup, the signal processing circuit is integrated with another circuit into one chip by a CMOS integrated circuit, and the signal processing circuit includes an amplifier circuit amplifying the output signal from the optical pickup, a conversion circuit converting an output from the amplifier circuit to a digital signal on the basis of a first reference value and a feedback circuit integrating the digital signal from the conversion circuit and feeding back the integrated digital signal as a second reference value of the amplifier circuit.
In this semiconductor integrated circuit, the signal processing circuit amplifying the output signal from the optical pickup is formed by a signal processing circuit capable of implementing a function of adjusting a slice level with a small-scale circuit area while keeping the circuit at a high speed and this signal processing circuit is integrated with another circuit into one chip by a CMOS integrated circuit. Thus, it is possible to implement a one-chip CMOS integrated circuit for an optical disk drive capable of implementing a function of adjusting a slice level with a small-scale circuit area while keeping a high speed.
The signal processing circuit preferably further includes a detection circuit detecting a dc component of the signal not yet amplified by the amplifier circuit.
In this case, it is possible to detect the dc component of the signal not yet subjected to amplification, i.e., the signal not yet subjected to adjustment of the center voltage level in response to the level of the digital signal from the conversion circuit, whereby a dc component of the signal can be correctly detected.
The detection circuit preferably includes at least either a peak hold circuit detecting and holding a peak value of the signal not yet amplified by the amplifier circuit or a bottom hold circuit detecting and holding a bottom value of the signal not yet amplified by the amplifier circuit.
In this case, the peak hold circuit or the bottom hold circuit detects the peak value or the bottom value of the signal not yet amplified by the amplifier circuit, whereby it is possible to detect the peak value or the bottom value of the signal not yet subjected to adjustment of the center voltage level in response to the level of the digital signal from the conversion circuit, so that a correct peak or bottom value of the signal can be detected.
The amplifier circuit preferably includes at least two stages of amplifier circuits formed by a first amplifier circuit located on an input side and a second amplifier circuit located on an output side.
In this case, the first amplifier circuit can adjust the center voltage level of the input signal while the second amplifier circuit can amplify the input signal to a desired amplitude, so that the input signal can be amplified in high precision and output to the conversion circuit.
The feedback circuit preferably integrates the digital signal from the conversion circuit and feeds back the integrated digital signal to the first amplifier circuit.
In this case, the digital signal from the conversion circuit is integrated and fed back to the first amplifier circuit, whereby the center voltage level of the input signal can be adjusted in response to the level of the digital signal and a slice level can be properly controlled.